Single crystal photovoltaic devices, especially silicon photovoltaic devices have been utilized for some time as sources of electrical power because they are inherently non-polluting, silent and consume no expendable natural resources in their operation. However, the utility of such devices is limited by problems associated with the manufacture thereof. More particularly, single crystal materials (1) are difficult to produce in sizes substantially larger than several inches in diameter; (2) are thicker and heavier than their thin film counterparts; and (3) are expensive and time consuming to fabricate.
Recently, considerable efforts have been made to develop processes for depositing amorphous semiconductor films, each of which can encompass relatively large areas, and which can be doped to form p-type and n-type materials for the production of p-i-n type devices substantially equivalent to those formed by their crystalline counterparts. It is to be noted that the term "amorphous" as used herein, includes all materials or alloys which have long range disorder, although they may have short or intermediate range order or even contain, at times, crystalline inclusions. As used herein, the term "microcrystalline" is defined as a unique class of said amorphous material characterized by a volume fraction of inclusions being greater than a threshold value at which the onset of substantial changes in certain key parameters, such as band gap, electrical conductivity and absorption constant, occurs. It is to be noted that pursuant to the foregoing definitions, a microcrystalline semiconductor alloy falls within the generic term "amorphous."
For many years, such work with amorphous silicon or germanium films was substantially unproductive because of the presence therein of microvoids and dangling bonds which produce a high density of localized states in the energy gap, which states are derogatory to the electrical properties of such films. Initially, the reduction of the localized states was accomplished by glow discharge deposition of amorphous silicon (SiH.sub.4) gas is passed through a reaction tube where the gas is decomposed by a radio frequency (r.f.) glow discharge and deposited on a substrate maintained at a temperature of about 500-600 degrees K (227.degree.-327.degree. degrees C.). The material so deposited on the substrate is an intrinsic amorphus material consisting of silicon and hydrogen. To produce a doped amorphous material, an N-dopant such as phosphine gas (PH.sub.3), or a P-dopant such as diborane (B.sub.2 H.sub.6) gas, is premixed with the silane gas and passed through the glow discharge reaction tube under the same operating conditions. The materials so deposited include supposedly substitutional phosphorus or boron dopants and is shown to be extrinsic and of n or p conduction type. The hydrogen in the silane was found to combine, at an optimum temperature, with many of the dangling bonds of the silicon during the glow discharge deposition to substantially reduce the density of the localizes states in the energy gap, thereby causing the amorphous material to more nearly approximate the corresponding crystalline material.
It is now possible to prepare by glow discharge or vapor deposition thin film amorphous silicon or germanium alloys in large areas, said alloys possessing acceptable concentrations of localized states in the energy gaps thereof and high quality electronic properties. Suitable techniques are fully described in U.S. Pat. No. 4,226,898, entitled "Amorphous Semiconductor Equivalent to Crystalline Semiconductors," of Stanford R. Ovshinsky and Arun Madan which issued Oct. 7, 1980, in U.S. Pat. No. 4,217,374, under the same title to Stanford R. Ovshinsky and Masatsugu Izu, which issued on Aug. 12, 1980, and U.S. Pat. No. of Stanford R. Ovshinsky, David D. Allred, Lee Walter and Stephen J. Hudgens entitled "Method of Making Amorphous Semiconductor Alloys and Devices Using Microwave Energy." As disclosed in these patents, it is believed that compensating agents such as fluorine and/or hydrogen introduced into the amorphus semiconductor operate to substantially reduce the density of the localized states therein and facilitate the addition of other alloying materials.
Since amorphous alloys may be readily deposited atop a wide variety of substrates and over large areas, it is now possible to readily fabricate multiple cell stacked photovoltaic structures. The concept of utilizing multiple cells, to enhance photovoltaic device efficiency was discussed at least as early as 1955 by E. D. Jackson, in U.S. Pat. No. 2,949,498, issued Aug. 16, 1960. The multiple cell structures therein disclosed utilized p-n junction crystalline semiconductor devices. Essentially, the concept is directed to utilizing different band gap devices to more efficiently collect various portions of the solar spectrum and to increase open circuit voltage (Voc.). The tandem cell device has two or more cells with a light directed serially through each cell, with a large band gap material followed by a smaller band gap material to absorb the light passed through the first cell or layer. By substantially matching the generated currents from each cell, the overall open circuit voltage is the sum of the open circuit voltage of each cell while the short circuit current remains substantially constant. It should be noted that Jackson employed crystalline semiconductor materials for the fabrication of the stacked cell device; however, it is virtually impossible to match lattice constants of differing crystalline materials. Therefore, it is not possible to fabricate such crystalline tandem structures in a commercially feasible manner. However, tandem structures can be economically fabricated in large areas by employing amorphous materials.
It is of obvious commercial importance to be able to mass produce photovoltaic devices such as solar cells. However, with crystalline cells, mass production was limited to batch processing techniques by the inherent growth requirements of the crystals. Unlike crystalline silicon, amorphous silicon alloys can be deposited in multiple layers over large area substrates to form solar cells in a high volume, continuous processing system. Such continuous processing systems are disclosed in the following U.S. patents: U.S. Pat. No. 4,400,409 for "A Method of Making P-Doped Silicon Films and Devices Made Therefrom"; U.S. Pat. No. 4,410,588, for "Continuous Amorphous Solar Cell Deposition and Isolation System and Method"; U.S. Pat. No. 4,542,711, for "Continuous System for Depositing Amorphous Semiconductor Material"; U.S. Pat. No. 4,492,181, for "Method and Apparatus for Continuously Producing Tandem Amorphous Photovoltaic Cells"; and U.S. Pat. No. 4,410,558 for "Continuous Amorphous Solar Cell Production System." As disclosed in these patents, a substrate may be continuously advanced through a succession of deposition chambers, wherein each chamber is dedicated to the deposition of a specific semiconductor material. In making a solar cell of p-i-n type configuration, the first chamber is dedicated for depositing a p-type amorphous silicon alloy, the second chamber is dedicated for depositing an intrinsic amorphous silicon alloy, and the third chamber is dedicated for depositing an n-type amorphous silicon alloy.
Since each deposited semiconductor alloy, and especially the intrinsic semiconductor alloy, must be of high purity: (1) the deposition environment in the intrinsic deposition chamber to prevent the diffusion of doping constituents into the intrinsic chamber; (2) the substrate is carefully cleansed prior to initiation of the deposition process to remove contaminants; (3) all of the chambers which combine to form the deposition apparatus are sealed and leak checked to prevent the influx of environmental contaminants; (4) the deposition apparatus is pumped down and flushed with a sweep gas to remove contaminants from the interior walls thereof; and (5) only the purest reaction gases are employed to form the deposited semiconductor materials. In other words, every possible precaution is taken to insure that the sanctity of the vacuum envelope formed by the various chambers of the deposition apparatus remains uncontaminated by impurities, regardless of origin.
The layers of semiconductor material thus deposited in the vacuum envelope of the deposition apparatus may be utilized to form a wide variety of photovoltaic devices including one or more n-i-p cells, one or more p-i-n cells, a Schottky barrier device, photodials, phototransistors, or the like. Additionally, by making multiple passes through the succession of deposition chambers, or by providing an additional array of deposition chambers, multiple stacked cells of various configurations may be obtained.
While in some cases it is desirable to utilize the thus produced photovoltaic material in the form of a large area device, in other cases it is necessary to cut or sever large area photovoltaic material into smaller photovoltaic cells. It should be noted at this point that the term "severing" as used herein is meant to include cutting, shearing, punching, die cutting, slitting or any other process which penetrates the semiconductor device. Such smaller area cells have utility in consumer applications such as power sources for calculators, watches, toys and small electrical appliances. Also, if a roll-to-roll process is utilized for the continuous production of photovoltaic devices, it is necessary to sever that roll to produce discrete photovoltaic cells. And, if it is desired to produce large area power generation modules from the photovoltaic material, it is necessary to cut that material into smaller portions which will subsequently be electrically interconnected. The invention includes a method for severing a large area solar cell into smaller portions without causing the short circuiting thereof.
The typical thin film photovoltaic cell will be described in greater detail hereinbelow; however, such a cell includes a substrate, which forms the base electrode or has a base electrode region thereupon, a semiconductor body deposited atop the base electrode and a relatively transparent electrically conductive top electrode member. Top electrode members are generally formed of a transparent oxide material such as indium tin oxide, tin oxide, indium oxide, cadmium stannate and zinc oxide.
Problems are encountered in severing a photovoltaic cell of this type because the cutting process tends to produce one or more short circuit current paths which establish electrical communication between the top electrode and the base electrode of the photovoltaic device. It has generally been found by applicants that the transparent conductive oxide material is relatively brittle and tends to form a plurality of shards when subjected to a shearing force in the cutting process. These shards penetrate through or bridge across the semiconductor body and establish a short circuit current path between the remainder of the top electrode material and the electrically conductive base electrode. Obviously, the shorted photovoltaic cell is of no practical utility.
Several approaches to this problem have heretofore been implemented so as to allow for severing of the large area photovoltaic material. However, these processes are time and labor intensive and tend to waste photovoltaic material. For example, as disclosed in U.S. Pat. No. 4,419,530 entitled "Solar Cell and Method for Producing Same," various "scribing" methods may be utilized to remove portions of the transparent conductive oxide layer from the photovoltaic cell in regions which are to be cut. In this manner, the problem of short circuiting by the shards is obviated. Among the scribing techniques are (a) chemical etching techniques, (b) plasma etching techniques, (c) laser scribing techniques, (d) water jet techniques and (e) the use of masking techniques during the deposition of the transparent conductive oxide top electrode layer. While all of these techniques do work, they necessitate extra processing steps, and in some cases rely upon the use of bulky and/or expensive additional hardware.
As disclosed in U.S. Pat. No. 4,485,264 entitled "Isolation Layer for Photovoltaic Device and Method of Producing Same," the semiconductor body of a photovoltaic cell may be provided with TCO free regions by first forming a pattern of relatively thick, electrically insulating silicone material thereupon prior to the deposition to the TCO layer. The thick insulating layer prevents the formation of a continuous TCO layer thereacross and thus provides electrically isolated regions in which severing may take place without the creation of short circuit current paths. As in the previously described technique, this process requires fairly precise alignment and necessitates extra steps in the processing in the photovoltaic cells.
U.S. Pat. No. 4,704,369 entitled "Method of Severing a Semiconductor Device," discloses a method of cutting such device including a substrate having a base electrode region thereupon, a semiconductor body disposed upon the base electrode, and a transparent, electrically conductive top electrode deposited atop the semiconductor body. The method disclosed in this patent includes the steps of: providing means for supporting the top electrode side of the semiconductor device; disposing shearing means proximate the substrate side of the semiconductor device, and activating the shearing means so as to apply a shearing force to the device from the substrate side thereof. In one embodiment disclosed in the referenced patent, a protective member such as a sheet of cardboard, paper or synthetic polymer may optionally be disposed between the top electrode side of the semiconductor device and the support means so as to prevent damage to the top electrode during the cutting. However, since the patented method performs the severing operation upon the semiconductor device from the substrate side thereof, a specially designed and constructed die-cutting station, a version of which is disclosed in the patent, must be utilized to perform the patented method.
Clearly then, it is highly desirable to have a technique for severing semiconductor material, particularly large area photovoltaic devices, into small area photovoltaic cells without producing short circuits therein. This technique should not require the use of any complicated or extraneous hardware, nor should it impose any additional process steps on the fabrication of the semiconductor material.
These and other advantages of the instant invention will be more fully detailed and explained by the drawings, the description thereof and the claims which follow.